AXI Interconnect IP Overview The AXI4 Interconnect IP provides a performance-optimized generic communication AXI4 crossbar switch between multiple Slave and Master interfaces (M-to-N). There is a dedicated crossbar for both AXI4-read and AXI4-write channels. Generic...
AXI DMA IP Overview AXI DMA IP implements a generic data-mover engines on AXI4 protocol. Written from ground up in VHDL2008 standard and verified in simulator and on KCU116 hardware. It is available as a standadalone simple DMA engine (Also known as direct register...
