Hamming codes are simple forward error correction codes that are still widely used due to their simplicity especially for DDR memory applications (ECC). They are generally able to detect and correct single bit errors and in case of extended hamming codes, which include an extra parity bit also detect dual-bit errors (They are however not able to repair them). The IP supports both base and extended hamming codes with widths of up to 1024 bits. The extended hamming code is also known as SECDED (Single Error Correction – Double Error Detection). Note however that under certain circumstances (3-bit errors, correction enabled), the hamming code might flip wrong bit and incur additional error (IE. in this case 4 bits).

• Single bit error correction
• Double bit error detection (SECDED mode)
• Up to 1024b data width
• Full VHDL 2008 RTL-Base source code
• TestBench Included

The bit-mapping of the parity bits (Denoted as P) follows the scheme used to construct the generic hamming code with parity bits being in 2ⁿ locations [1 2 4 8 16 …] and data bits occupying remaining positions. The extra parity bit for SECDED mode might be generally located elsewhere, the IP puts this block at the end of each codeword (The last Index). Each of the hamming codes might use only just a portion of the available data bits, which are treated as “Arbitrary data bits“. This way,  one is for example able to create Hamming(127,120) sequences by using 64-bit data and force the remaining data bits to zero (120-64 = 56).